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Sandisk

ASIC Verification & Validation Engineer

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SoC Verification Engineer

The SoC Development team at Sandisk is seeking highly motivated SoC Verification Engineers to join our talented team, working on cutting-edge controller development for high-performance SoCs used in industry-leading products.

Role & Responsibilities:

As a SoC Verification Engineer, you will play a key role in ensuring the quality and reliability of our SoC designs. You will be responsible for:

  • Developing verification test plans based on design specifications.
  • Creating and executing test cases across multiple platforms, including RTL simulations, FPGA prototyping, and Palladium emulation.
  • Verification test structures (DFx Verification)
  • Performing Gate-Level Simulations (GLS) and debugging complex SoC designs.
  • Collaborating with design, architecture, and firmware teams to define verification strategies and drive coverage-driven verification methodologies.
  • Contributing to the development of advanced verification environments, including UVM, PSS testbenches.
  • Analyzing functional coverage and simulation results to enhance verification efficiency and effectiveness.
  • Generating Functional patterns required for Wafer Sorting.

    Why Join Us?

    At Sandisk, you’ll be part of a team of highly skilled engineers solving complex verification challenges and driving innovations in data storage solutions. Your work will directly impact the performance and reliability of high-volume new age data solutions, consumer and enterprise products.

    Together, we’ll push the boundaries of technology, unlock the full potential of data, and shape the future of storage solutions

Required:

  • BE or MS degree in Electrical/Electronics Engineering or Computer Engineering, with 4-8 years of experience
  • Deep understanding of C, System Verilog UVM and coverage driven verification methodology
  • Working experience in Verifying Processor based SoC's (ARM, RISC-V, ARC)
  • Experience in DFX Verification
  • Experience to generate functional patterns used for Post-Silicon testing.
  • History of building and improving UVM based verification methodology

Skills:

  • Develop and execute verification plans
  • Proficiency with C, Verilog, System Verilog and UVM based verification
  • Knowledge in various interfaces – PCIe or DDR, UART, I2C, I2S, SPI
  • Experience working on processor-based SoC -- ARC/ARM/RISC..
  • Experience in implementing advanced test benches, verification models, scoreboards/checkers.
  • Knowledge in bus protocols - AXI, AHB, APB and bus interconnects
  • Experience with test plan creation and test-bench development
  • Experience with test development and test coverage assessment
  • Excellent debugging and problem-solving skill
  • Create and modify SoC-level, and sub-system level test benches.
  • Experience in setting up and running gate-level simulations
  • Gate Level / Power-Aware simulations
  • Great written and verbal communication skills
  • Good Programming/Scripting skills with languages such as Python, Perl, TCL, and BASH
  • Interest in ASICs, SoCs, flash memory, semiconductor components
  • Strong team player who can collaborate with colleagues

All your information will be kept confidential according to EEO guidelines.

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